Switching techniques in regulated d. c. power supplies



May 30, DUB ET AL 3,323,034

SWITCHING TECHNIQUES IN REGULATED 13.0 POWER SUPPLIES Filed June 5, 1965 6 Sheets-Sheet l I IVE J2 Cf; O- V IO V o ma) a LATCH m SWITCH V VraF Vu;

CONTROL 2 F l G.- l

N.c. n SW,

C ILAT(H A m) swncu I Vo Vraf V f RESET CONTROL 5 RESET SWITCH Vo= v,,,=5 T comaon.

OR u i V 28 Q5 miI I 4 I I I I I V R INVENTO s W SOL GREENBERG A LESTER nuam Reser j\ BY GEORGE GAUTHEFHN My) DMAM ATTORNEYS May 30, 1967 DUB|N ET AL 3,323,034

SWITCHING TECHNIQUES IN REGULATED D.C. POWER SUPPLIES Filed June a, 1963 s Sheets-Sheet 2 0 C40 T V0 62 l ll rtf I R650 R 8/ 50 V, R50 l l V; QP VP 6/? INVENTORS son. GREENBERG LESTER ouem BY GEORGE GAUTHERIN m fla PM #74 ATTORNEYS May 30, 1967 ET AL 3,323,034

SWITCHING TECHNIQUES IN REGULATED D.C. POWER SUPPLIES Filed June 5, 1963 6 Sheets-Sheet 3 I I p6 a! RA &0 l

INVENTORS SOL GREENBERG LESTER DUBIN BY GEORGE GAUTHERIN "7.47m, PM i344.

ATTORNEYS May 30, 1967 DUBlN ET AL 3,323,034

SWITCHING TECHNIQUES IN RBGULATED D.C. POWER SUPPLIES Filed June 5, 1963 6 Sheets-Sheet 4 CIOO INVENTORS a SOL GREENBERG mm "l LESTER ouam v, GEORGE GAUTHERIN BY F I 60 l main, @740, Duafin-ffin'c.

ATTORNEYS May 30, 1967 L. DUBIN ET AL 3,323,034

SWITCHING TECHNIQUES IN REGULATED D.C. POWER SUPPLIES Filed June 5, 1963 6 Sheets-Sheet 5 INVENTORS SOL GREENBERG LESTER DUBIN BY GEORGE GAUTHERIN n77, him m, Du l Mun 9;

ATTORNEYS May 30, 1967 DUBlN ET AL 3,323,034

SWITCHING TECHNIQUES IN REGULATED D.C. POWER SUPPLIES SOL GREENBERG LESTER DUBIN BY GEORGE GAUTHERIN my, Z447 DMAM 1 8;

ATTORNEYS United States Patent 3,323,034 SWITCHING TECHNIQUES IN REGULATED D.C. POWER SUPPLIES Lester Dubin, Pelham Manor, Sol Greenberg, Port Washington, and George Gautherin, Woodside, N.Y., as-

signors to Lambda Electronics Corporation, Huntington, a body corporate of New York Filed June 5, 1963, Ser. No. 285,829 17 Claims. (Cl. 321-16) This invention relates to switching techniques for regulated DC. power supplies and more particularly to switching techniques for regulating A.C.-to-D.C. power supplies.

The invention has for a general object improvements in regulated DC. power supplies, particularly high current switching types, to the end that certain disadvantages associated with conventional supplies of this type (such as control circuit complexity, line frequency sensitivity, alternate-cycle instability tendencies, control lag, and phase shift sensitivity), are eliminated or reduced while their advantages (such as improved power handling capacity over variable impedance regulators), are retained and in some cases improved.

Other objects and advantages of the invention will be set forth in part hereinafter and in part will be obvious hereflom or may be learned by practice with the invention, the same being realized and attained by means of the instrumentalities and combinations pointed out in the appended claims.

The invention consists in the novel parts, constructions, arrangements, combinations and improvements herein shown and described.

Serving to illustrate exemplary embodiments of the invention together with explanatory data are the drawings of which:

FIGURE 1 is a schematic diagram illustrating a regulating circuit according to the invention;

FIGURES 1A and 1B are fragmentary block diagrams illustrating modifications to the circuit of FIGURE 1;

FIGURES 2 and 3 are timing diagrams illustrating certain performance characteristics of the arrangements of FIGURES 1, 1A and 1B; and

FIGURES 4-13 are schematic diagrams of various circuit configurations according to the invention.

In the circuit illustrated in FIGURE 1 a power input circuit ltl is adapted to be energized from an available source of alternating current which may be of any power frequency such as 25 cps., 60 cps. or 500 cps.

Circuit 10, which may comprise a transformer and rectifier combination, develops a voltage which is applied as V to a controlled switch herein exemplified as the emitter-collector circuit of a switching transistor, Q The emitter-collector circuit of Q is in serial relation with the power input circuit and with an output circuit including output terminals 0 and O and a filter capacitance C output voltage V is developed across C Generally there will be additional components connected to the output circuit; appropriate means for adjusting the output including adjustable dividers and reference potentials are included in the output and control circuits; in some cases a fine regulator (not shown) will be connected thereto. It should also be noted that although the following discussion treats output voltage as the controlled quantity, in appropriate cases output current may be similarly regulated.

The transistor Q includes a drive circuit 12 and switching means SW illustratively connected between its base and emitter. This arrangement is intended to symbolize the general case of a switch transistor drive circuit as well as means for modifying drive to the transistor to ice switch it between more (on) and less (off) conductive states.

Operatively coupled to switching means SW is a switch control circuit 11 which embodies a suitable circuit and components for actuating SW The control circuit receives inputs A and B and supplies an output control signal C to SW The switch control circuit also provides a latching or lockout function for holding the control circuit for a period of time in the condition which occurs when signal C terminates. This is symbolized by the return arrow marked LATCH.

Input A is derived from a reset control circuit K which receives inputs V and V or functions thereof, and provides output A when V is less than V Input B is derived from an error detecting or comparison circuit K which receives output voltage V or a function thereof as one input, and a reference potential, V as another. It provides output B when V is less than V In the following description, reference may also be had to FIGURE 2 which symbolically indicates certain aspects of system behavior.

For the purposes of the discussion it is assumed that input circuit 10 comprises a full wave rectifier producing the full wave voltage, V as shown in FIGURE 2. Voltage V is depicted as a typical filtered waveform with ripple exaggerated to facilitate explanation. For simplicity V is shown as having a value corresponding with the peak value of V but may actually be a fraction thereof which is in effect compared with a fraction of V Starting at a time, t V rises from a low value and approaches V which is decaying due to the discharge of C At time 1 the voltage V is equal to V and exceeds V thereafter for the indicated interval 1 to t During this interval and as seen in FIGURE 1, the emitter-collector potential of Q permits forward conduction. Also at time t and as shown in FIGURE 2, the output voltage V has decayed to a value less than that of the reference, V Hence input signal B occurs and the switch control circuit 11 switches SW on. Drive is thereby provided for s and emitter-collector current, i,,, flows charging C; and raising V as indicated in the interval t -t of FIG- URE 2. When, at time t the output voltage approaches equality with the reference, V ef, then signal B terminates since V is no longer less than V SW is thus switched off and Q is thereby cut off. Due to the latching or lock out function, the control circuit is held inoperable until the time i At time 1 V falls below V hence, as seen in FIGS. 1, 2, the reset signal is initiated. This signal terminates the latch function whereby further switching may occur. Note however, that at t further conduction of Q is precluded because V fall below V With the circuit reset, however, readiness for a switching cycle during the next succeeding period is established.

In the illustrated case, it may be seen that the switching is initiated during the leading or rising period of the input and is terminated in accordance with a relation between V and V e.g., when V equals V The conduction period is automatically controlled to return V to the reference value, this period being automatically adjusted to account for line voltage changes, varying discharge rates of C due to load changes, and other disturbances. Note in FIGURE 2 that notwithstanding V decays at Varying rates during each cycle, due for example to a dynamic load, the switch conduction period, Q on, is automatically controlled to bring V back to V Following this, latch out occurs and then reset. By this arrangement, several disadvantages characterizing conventional switching circuits in regulated supplies are eliminated while their advantages are preserved.

Several variations of the foregoing are shown in FIG- URES 1A and 1B. In FIGURE 1A the reset action is simply a function of V and the latch function is initiated as a function of current i flowing in the emitter-collector circuit of Q In FIGURE 1B, switching means SW is normally closed (conductive), input B occurs when V equals V and reset input A occurs when V equals 0, (see FIG. 3), or when V equals 2 where 2 is an appropriate potential. Latching occurs when signal C' is applied to SW In the example of FIGURE 1B (see also FIGURE 2) switching means SW is normally closed and thus Q conducts as soon as V equals V When V is increased to the point where it equals Vref input B occurs and in this case the switch control responds by supplying a Signal C which opens SW to cut off Q Specific circuit embodiments related to the foregoing are described below:

The simplified circuit of FIGURE 4 includes a full wave bridge rectifier BR which supplies current to an output circuit under the control of switching transistor Q whose emitter-collector circuit is connected between BR and the output circuit. Filter capacitor C is connected across the output terminals as are means constituting a load, R

Connected between the collector and base of Q is a resistance R the base is also connected to the return line of the supply via the serial combination comprising the anode-cathode circuit of a gated rectifier GR which may be a silicon controlled rectifier, and a source of reference potential V The gate of GR is connected to output terminal 0 As V rises and exceeds V which may be decaying, the emitter-collector of Q becomes forward-biased and base-emitter drive is supplied via R Q conducts, charging filter C and raising V When the output voltage V which is sampled by the gate of GR exceeds V f, current flows in the gate-cathode circuit of GR the latter conducts thereby cutting off Q Because of the latching characteristic of GR which is in the nature of a memory function, the controlled rectifier remains in the conductive state for a period of time even though gate current may cease as a result of the discharge of C which acts to drop V below V The transistor Q is maintained cut off for this latched period. When V falls below V the gated rectifier is reverse-biased and thus cuts off, thereby terminating the latching function and providing reset. During the interval from this cut-ofi time to the time when V falls below V the circuit may be switched on again.

The circuit of FIGURE 5 provides a switching transistor Q having an emitter-collector circuit connected in one leg of the supply between the power source embodied as bridge B11 and an output circuit generally indicated at 50. The output circuit include filter C connected across the combination of BR and Q and a regulator circuit including regulator control system RG and a series variable impedance circuit Q which is in series With output terminals O O Variable impedance Q and the output terminals are connected across C while RG senses departures in output voltage V from a reference value and in known manner develops an appropri-- ate control signal for Q whereby the latter, which may comprise a pass transistor undergoes the requisite impedance change to correct the output voltage variation.

Connected between the base and emitter of Q is the secondary of a coupling transformer T The primary winding is connected in series with the emitter-collector circuit of a control transistor Q this resultant branch being connected across the output terminals of BR The base of Q is connected to the junction of resistance R and the anode of GR a controlled rectifier. The series branch R GR is also connected across the rectifier circuit and is thus energized by V The gate of GR is connected to output terminal Q via zener diode D2 which conducts when a reverse voltage of proper polarity is applied thereto. The voltage applied to DZ comprises essentially the drop V across the series variable impedance Q,. (The zener voltage is illustratively much larger than the gate voltage of GR Hence the switching circuit will function to maintain this drop substantially constant. For purposes of explanation this may be regarded as accomplished if the switching circuit keeps the voltage V across filter C at a constant value.

As the voltage V rises above the value V the emittercollector circuit of Q becomes forward-biased. V also appears across the anode-cathode of GR it being assumed that the controlled rectifier is non-conducting. In its initial rise this voltage forward-biases the emitterbase of Q and the emitter-collector of the latter con ducts causing current to flow through the primary of T This current induces a forward-biasing voltage in the secondary. When V subsequently exceeds V stage Q conducts. The voltage V therefore rises as C is charged. Assuming V is held constant by Q then voltage V will rise. Q continues conducting until V exceeds the breakdown voltage, V of zener diode DZ at this time the latter conducts; gate-cathode current flows in GR and the latter conducts. This tends to cut off Q thus cutting off Q Q remains cut oif because of the latching function of GR which will continue conductive until V drops to a low extinguishing value. At this time the circuit is reset and conditioned for switching during the next cycle, the switching interval being automatically adjusted to recharge C to the requisite voltage.

The circuit of FIGURE 6 includes a rectifier embodied as a bridge BR Connected between one output terminal of the bridge and an output circuit generally indi cated at 6th is the emitter-collector circuit of a switching transistor Q The emitter or output electrode of Q is connected to one side of filter capacitance C the other side of the capacitor being connected to the return leg of the bridge.

In addition to C the output circuit 60 includes a series-connected variable impedance device Q and output terminals 0 and 0 adapted to supply power to a load R In contrast with the circuit of FIGURE 5, the variable impedance Q, in FIGURE 6 is in the positive leg of the supply, output terminal Q being connected to the return terminal of the bridge.

The variable impedance Q is controlled by regulator system RG in accordance with variations in the output voltage V as sensed by RG A circuit for controlling the switching transistor Q comprises a transistor Q having an emitter and collector connected to the base and collector, respectively, of Q The base of Q is connected through a resistance R to the positive terminal of the bridge and is also connected through a serial combination of a controlled rectifier GR and zener diode D2 to output terminal 0 The gate electrode of GR is connected via R to the emitter of Q60- As V increases to the point where it exceeds V driver Q and switch Q conduct, charging C The voltage V across C thus rises. Assuming that output voltage V is held constant by Q then as the voltage V rises and exceeds the breakdown voltage of zener diode D2 gate-cathode current flows through GR via R and DZ The controlled rectifier therefore conducts, its anode-cathode circuit being energized by the difference between V and V plus V The conduction of GR cuts off Q and Q thus terminating the rise in V and V The latching function of GR maintains this condition until V rops below V plus V At this time the anode-cathode of GR is reverse-biased and the controlled rectifier cuts off. The circuit is accordingly reset in readiness for switching during the next input cycle.

As an alternate to the above-described arrangement, the zener diode D2 may be replaced by suitable means for developing a reference pgtential as shown in the dashed lines of FIGURE 6. Such an arrangement maybe connected from the cathode of GR to the return terminal of the bridge.

The circuit of FIGURE 7 is similar in certain respects to the circuit of FIGURE 6 and is designed to illustrate the development of a memory function other than by the use of a controlled rectifier.

Connected to the base of driver Q is the emitter of a transistor Q The collector of Q is connected to the base of a further transistor Q and both electrodes :are connected to output terminal 0 via resistor R The base of Q is connected to the collector of Q while the emitter of the latter is connected to the return terminal of the bridge through a reference producing device 75.

An additional regulator system is not employed in the circuit of FIGURE 7 and the voltage V across filter C may be regarded as the output voltage.

Assuming Q and Q to be initially cut off, then a rise in V above V will switch Q into its conductive state with the aid of Q As the output voltage V rises to the desired potential, Q becomes forward biased, it being originally cut off because of the back bias supplied by the reference potential means 75. The resultant conduction through the collector-emitter of Q via the emitter base of Q causes this circuit to be energized by V Stage Q accordingly conducts as well and switch transistor Q is thus switched off. The combination Q Q will continue to conduct thereby holding Q in the cut off condition notwithstanding a drop in V below V This results from the fact that the collector current of Q supplies drive current for the base-emitter of Q The combination will ultimately cut ofi when V drops to a sufficiently low value to reverse-bias Q and Q The circuit is thus reset and conditioned for the next succeeding cycle.

The system of FIGURE 8 may be seen to comprise two interconnected sections 80 and 81. Section 80 resembles in a number of respects the circuit of FIGURE 4. It includes switching transistor Q connected to an output terminal of a rectifier B11 which is energized from a winding SW of power transformer T Initial drive for Q is by way of R interconnecting collector and base. The base is also connected to the switching control circuit including controlled rectifier GR and means for providing a reference potential, V The gate of GR is connected via sensitive R to output terminal 0 In the instant embodiment, the switching transistor Q does not directly charge the output filter C but rather controls a power transistor Q which performs this function. Transistor Q has its emitter-collector circuit connected between output filter Q and a source of filtered D.C. provided by secondary winding SW rectifier BR connected thereto, and filter C As switching circuit 80 operates in the manner hereinbefore described, Q is synchronously switched on, switched off, latched and reset. When switched on, Q supplies drive to Q via emitter to base connection. Q is accordingly switched in correspondence with Q to control the charging of C whereby the output voltage V is controlled.

In FIGURE 9, switching transistor Q is placed in the negative leg of the supply and the rectifier W comprises a full wave common cathode arrangement with a center tapped transformer secondary SW Operation of the circuit is as generally described hereinbefore.

FIGURE illustrates schematically, application of the techniques hereinbefore described to a pair of switching transistors Q Q which also serve as the rectifying elements, being illustratively disposed in full wave connection with the secondary winding SW of power transformer T Each switching transistor is controlled during its respective half cycle period to regulate the charge across output filter C the sequence comprising a switching on of the transistor until the output attains the desired value, then a switching off and latching of the transistor, followed by reset.

In the circuit of FIGURE 11, the anode-cathode circuit of a controlled rectifier GR is connected between the power supply bridge BR and the output filter C The latter shunts the output terminals 0 0 For initially switching GR to the on state when V rises to a sufficiently high value, a circuit is provided comprising resistances R R serially connected between the anode and gate of GR When V reaches the conducting value where it exceeds V,, (the drop across the primary winding of a transformer T in the return leg is disregarded at this time), then current will flow through R R and the gate-cathode of GR causing conduction in the anode-cathode circuit and the resultant charglIlg of C110.

As C charges, output voltage V rises. Voltage V is applied to a series circuit comprising a resistance R the gate-cathode of a controlled rectifier GR a resistance R and a reference potential source, V When V reaches the prescribed value, the reverse-biasing effect of V is overcome and gate-cathode current flows in GR At this time, V exceeds V ef and anode-cathode current fiows in GR When GR turns on it supplies a current from its cathode through a capacitance C to the gate-cathode circuit of a controlled rectifier GR the cathode of which is connected to the cathode of GR The anode of GR is connected via a capacitor C to the anode of GR hence the serial combination of c and GR bridges the main switching rectifier GR As described more fully hereinafter, C is periodically charged with a voltage V and when GR is switched on, C discharges, forcing a reverse cut off current to flow through the main switching rectifier GR This action closely follows the aforementioned switching of GR Hence GR is cut oif when V reaches the required value.

The extinguishing voltage V stored across C is derive-d from a circuit which includes a voltage source V resistance R and the emitter-collector circuit of a transistor Q all in serial relation. The base-emitter of Q is connected to the secondary winding of transformer T in such a manner that load current initially flowing through the primary as GR conducts, induces a forward biasing voltage in the secondary whereupon Q conducts and C is charged from V During the interval when voltage V is forcing cut-off current through GR the second voltage of T reverses polarity; Q is cut off, isolating C from V As voltage V decays, a transistor Q is switched on. This transistor has its emitter-collector circuit in series with a capacitance C the combination being connected across C and GR C is charged from V via a resistance R and as Q is switched on, C discharges through its emitter-collector, thereby supplying a cut oif current which flows through GR and cuts the latter off. GR cuts off when V falls below V at which time it is reversed-biased. The circuit is accordingly reset and thereby conditioned for the next cycle.

The embodiment of FIGURE 12 employs as the switching means between input voltage V and output voltage V a semiconductive switch GR which is illustratively a three terminal device but may be of four terminal configuration. Switch GR has a gate for controlling conduction and cut off of the anode-cathode circuit and is thus unlike conventional controlled rectifiers wherein once conduction has been established, the gatecathode circuit loses control over conduction.

Switching means GR thus comprises a bilaterally controlled latching rectifier of the type wherein the gatecathode circuit retains control over anode-cathode conduction and can terminate the latter upon receipt of a control or switching current which flows in the reverse direction from the cathode to the gate. Such a rectifier is illustratively of the type described in the Motorola Company specification sheet for the type MGCS 821 solid state switch.

Switch GR has its anode-cathode circuit connected between the input circuit bridge, BR and the output circuit comprising C connected across output terminals 0 GR is switched on and off as hereinafter described whereby controlled pulses of cunrent are fed to the filter C The control circuit of GlR includes a resistance R connected between its gate and cathode, and an npn transistor stage Q the latter has an emitter which is connected to the gate of GR via capacitance C and a collector which is connected to the positive terminal of BR Collector and base of Q are interconnected Vla- R120.

The emitter of Q is also connected to the positive leg of the supply via a diode D and the anode-cathode circuit of a conventional controlled rectifier GR The base of Q is connected to this circuit at the junction of D122 and GR121.

The cathode of GR is connected to the positive leg of the supply while the gate is connected to the same point through the series combination of a voltage source E and the collector-emitter circuit of a pnp transistor Q The base of Q is returned to the negative supply branch through a source of reference potential, V

In a typical operating sequence, transistor stage Q becomes forward-biased and conducts during the leading or rising interval of bridge voltage V when this voltage exceeds V (residual potentials are ignored for simplicity). Current then flows in the forward direction through Q C and the gase-cathode of GR A part of this current also flows through R When the gate current reaches the threshold value of GR the latter is transferred to the conductive state and cur-rent is delivered to the output circuit, increasing V At this time Q becomes reversed-biased and C has received an appropriate charge which, as noted below, is used in the turn-off operation.

When V reaches the required value relative to V the emitter-base of Q becomes forward biased and the emitter-collector circuit thereof becomes conductive. At this time E supplies current from its positive terminal through the gate-cathode of GR and through the emitter-collector of Q to its negative terminal. GR is thus transferred to the conductive state.

With GR on, the capacitance C which was charged during the transient period preceding the firing of GR discharge through the anode-cathode of GR and through the cathode-gate of GlR whence the latter is cut-off. Conduction of a small current through GR continues via R until V falls below V During the next cycle, the control operation is repeated provided sufficient load cur-rent has been drawn from the output circuit.

In the embodiment of FIGURE 13, rectified load current is obtained from a bridge rectifier BR connected to taps 130A, 130B on the secondary winding SW of a power transformer T Primary winding P thereof is adapted for energization from an alternating current source.

The rectifier output is applied to the diode-capacitance combination D C the diode is used for isolation while the capacitance serves for transformer leakage inductance compensation. The voltage across C is applied to a circuit which includes a switching element GR in the positive leg of the supply, an output circuit generally indicated at 136, and a choke L in the negative supply leg. The output circuit includes filter capacitances C and C which are primarily charged according to the switching actions of switch GR and the attendant flyback action of inductor L, respectively.

Turn-0n of GR is effected through a control circuit which includes transistor Q and resistance R connected between the collector and base thereof. The collector-emitter circuit of Q is connected between the positive bridge output terminal and the gate of GR Hence, when the bridge voltage V rises suificiently above the output voltage component V across filter C then Q becomes forward biased and current flows through the gate-cathode circuit of switch GR The latter, which may be a conventional silicon controlled rectifier, thereupon fires, conducting current from C initially, and then from BR to the output circuit; the return path includes choke L and thus the load current increases gradually rather than abruptly.

Turn-off of GR is initiated -by a comparator circuit including transistor stage Q It may be seen that the emitter-base circuit thereof is energized according to the difference between output voltage, V and reference potential means, V When V reaches a predetermined relation with respect to V then Q is switched on. Current then flows from output terminal 0 through the emitter-collector circuit, through a source V through the gate-cathode circuit of a gated rectifier GR and through a resistance R and an output diode D When controlled rectifier GR is thus energized, an initial cut-off current surge is drawn from a source of voltage V which source comprises center-tapped winding S /V and full wave rectifier D D This current flows through the anode-cathode circuit of GR through R and diodes D and D Since the emitter-base of turn-on transistor Q parallels D then it may be seen that the firing of GR acts to cut off Q Q remains cut off, i.e., is latched off so long as GR continues to conduct; conduction of GR ceases when the relations between the voltages V V and V produce an extinguishing anode-cathode potential at GR At this time the circuit is reset and if conditions are proper Q may again become conductive to thereby trigger GR into the conductive state.

The cut off of main switch GR involves further elements of the turn-ofi circuit including the diode-capacitance combinations D C and D C These combinations are energized from the respective end terminals of winding SW and provide voltages V and V across C and C respectively. These voltages as shown below, are employed alternatively under control of associated controlled rectifiers to drive reverse or cut-off current through GR The extinguishing voltages V and V g are applied to the anodes of respective controlled rectifiers GR and GR The cathodes thereof are connected together and to the cathode of the main switching rectifier GR Hence when either one of the cut-off rectifiers, GR GR conducts, there is applied to the cathode of main switch GR the voltage V or V The peak value of each of these voltages exceeds the voltage V across C on the anode side of GR Thus, the applied voltage, V or V will drive a reverse current through GR to cause rapid and positive cut-off thereof. In addition, the actuated rectifier GI-l or GR provides a current path for a part of the flyback current associated with choke L when switch GR is cut off.

It may be seen that as the voltage V or V decays, following its application to GR then the associated control rectifier GR or GR also cuts off. Hence the need for additional cut-off circuits to extinguish GR GR is eliminated.

The firing of cut-off rectifiers GR and GR is controlled according to the condition of GR and GR When GR is conductive, the anode-cathode potential thereof is low. Hence, in the circuit R R which shunts GR the drop across R is low. When GR conducts, there is a potential drop across R The net potential of R and R is applied to the base-emitter of a stage Q and under the above conditions, i.e., with GR and GR conductive, Q is forward biased. The emitter-collector circuit thereof is connected via limiting resistance R to a source of rectifier potential comprising center-tapped winding SW and diodes D D To this source are connected the gate-cathode circuits of GR and GR Hence, when Q is conductive, cur- 9 rent will flow during one half wave period from SW through D through the gate-cathode of GR through R and thence via the emitter-collector of Q and R to the center tap of SW On the alternate half cycle, current will flow from SW through D through the gate-cathode of GR and thence back to the center tap Via R135, the emitter COHeCtOr Qf Q132, and R137.

It may be seen that, provided Q is conducting, and with windings SW and SW properly phased, then rectifiers GR and GR will fire on alternate cycles, thereby applying the associated quenching voltage V and V to the main rectifier GR whereby it is cut-off. Since Q is switched on when GR conducts (and provided GR is on), and since GR conducts when V attains the desired value, then it can be seen that the power switch GR is cut off during each cycle when V is at the required value. During one cycle, the quenching voltage is V during the next cycle, V is applied. (Besides delivering reverse current through GR these sources supply transient current pulses to the output circuit.)

It should be noted that Q will not conduct, and therefore GR and GR will not fire, when conditions require that GR be maintained cut off for the entire cycle. Hence the possibility of delivering unwanted current to the output circuit from V g or V is eliminated.

As noted hereinbefore, GR and GR will each automatically cut off when the respective anode voltage, V or V falls below output voltage component V Continued quiescent cut oil is insured since the gates are connected via respective resistances R R to the negative terminal 0 The output circuit includes filter capacitance C which is supplied current via GR and is connected to output terminal 0 via diode D Another filter C receives flyback current from choke L via diode D and is connected to output terminal 0 via a diode D the common terminals of C and C, are connected to choke L and to output terminal 0 Diode D interconnects the other terminals of C and C During conduction of GR current from the source is switched to C Load current is delivered to the output from C via D When GR is cut off, flyback current is delivered via D to Cf and to output terminal Q from C, via D Further features and aspects of the output circuit are described and claimed in copending application Serial No. 285,830, filed June 5, 1963, now Patent No. 3,293,532, and assigned to the assignee of the instant application.

It may be seen from the foregoing that the dual, alternately operative cut-off circuits including GR GR and the related sources and elements have the advantage of maintaining a cut-off voltage available for application to GR at all times. Hence, when voltage V g is depleted during the switching off of GR during one cycle, the voltage V g is available for this function during the next cycle; V g can be recharged during this next cycle. Moreover the control circuits of GR GR are such that each rectifier is automatically cut ofi in the process of delivering cut-off current to the main switch GR In the analysis and practice of the invention modifications will undoubtedly occur to those skilled in the art. The invention is thus not limited to the specific circuits shown and described, but departures may be made therefrom within the scope of the accompanying claims without departing from the principles of the invention and without sacrificing its chief advantages.

What is claimed is:

1. A switching type regulated DC. power supply adapted to be energized from a rectified alternating current source of variable frequency, comprising an output circuit for delivering a DC. output, semiconductive switching means having a switch circuit adapted to conduct unipolar current between said source and said output circuit for regulating said output, error sensing means operatively connected to said output circuit, synchronized 10 wide band switch control means operatively coupled to said switching means and to said error sensing means for switching said switching means, said switch control means including reset means connected to be responsive to the amplitude of said source for conditioning said control means in synchronism with said source, said control means being responsive to said reset means and said error sensing means whereby said switch circuit is rendered conductive during the leading period of said alternating current source to regulate the amplitude of said DC. output, said switch control means also comprising latching means having a memory characteristic and operable to periodically deactivate said control means and holding same deactivated in synchronism with the cycling of said source.

2. A supply as defined in claim 1 in which said reset means comprise circuit connections for making said switch control means responsive to the amplitude of said alternating current source.

3. A supply as defined in claim 1 in which said semiconductive switching means is energized at low frequency values of said alternating current source with a substantially unfiltered voltage derived from said source.

4. A supply as defined in claim 1 in which said latching means and semi-conductive switching means each comprise controlled rectifiers and said error sensing means include reference potential means connected to said output circuit and the controlled rectifier of said latching means.

5. A supply as defined in claim 1 in which said output circuit includes a variable impedance regulator energized by said switching means.

6. A supply as defined in claim 1 in which said switch control means include a controlled rectifier having an anode-cathode circuit included in said latching means, and a gate-cathode circuit forming a component of said error sensing means.

7. A supply as defined in claim 6 in which said semiconductive switch means comprise a power carrying controlled rectifier and said reset means comprise circuit connections to said controlled rectifier of said switch control means for sampling the amplitude of said alternating current source.

8. A switching regulator for a DC. power supply comprising a full wave rectifier adapted to be energized from an alternating current source of variable frequency, an output circuit for supplying a regulated output, switch means serially interconnected between said full wave rectifier and said output circuit, switch control means adapted to be synchronously coupled with said alternating current source and coupled to said output circuit and said switch means for synchronously switching said switch means in accordance with said output and with said alternating current source to regulate said output, said switch control means including a latching circuit energized at the termination of the conducting periods of said switch means and having a memory characteristic to hold said switch means disabled.

9. A regulator as defined in claim 6 in which said switch control means comprise a controlled rectifier and said latching circuit includes the anode-cathode circuit of said controlled rectifier.

10. A regulator as defined in claim 9 in which the gatecathode circuit of said controlled rectifier includes reference potential means and is connected to said output circuit for energizing said controlled rectifier when said output attains a prescribed value.

11. A regulated DC. power supply adapted to be energized from a rectified alternating current source comprising an output circuit for delivering a DC. output, a switching element having an output current conducting circuit connected between said source and said output circuit, and a wide band synchronized switch control circuit operatively coupled to said switching element and said output circuit and including error detecting means, reference potential means, reset means and latching means, said error detecting means being responsive to said output and to said reference potential means, said reset means being responsive to said A.C. source, and said latching means having a memory characteristic and being responsive to the output of said control circuit whereby switching of said current conducting circuit to the conductive state occurs during the first 90 interval of a period of said alternating current source, said conductive condition is maintained until said error detector signals a predetermined error condition whereupon said switching element is switched off, said conducting circuit is latched in the off condition for an interval related to the period of said A.C. source, and said control circuit is reset to render it active for a subsequent 90 interval.

12. A supply as defined in claim 11 in which said error detecting means comprise the gate-cathode circuit of a controlled rectifier, said latching means include the anodecathode circuit of said controlled rectifier and said reset means comprise coupling means for connecting said anode-cathode circuit to said source.

13. A supply as defined in claim 12 in which said switching element comprises a power transistor and including a control transistor interconnecting said controlled rectifier and said power transistor.

14. A supply as defined in claim 12 in which said switching element comprises a controlled power rectifier and said switch control circuit includes cut-off means responsive to said DC. output for driving reverse current through said controlled power rectifier.

15. A supply as defined in claim 14 in which said cut off means comprise a pair of alternately operative controlled rectifiers and respective stored voltage sources.

16. A regulated DC. power supply adapted to be energized from an alternating current source of variable frequency, comprising an output circuit for delivering a DC. output, transistor switching means having an emitter-collector circuit adapted to conduct unipolar current between said source and said output circuit, an error sensing circuit operatively connected to said output circuit and including reference potential means, switch control means coupled to said transistor switching means and to said error sensing means for switching said switching means, said switch control means including reset connecting means for synchronizing said source and said switch control means, whereby said emitter-collector circuit is conductive during the leading period of said alternating current source to increase the amplitude of said DC. output to a reference value, said switch control means also comprising latching means operable to periodically deactivate said control means until subsequent conditioning by said reset means.

17. A regulated DC. power supply adapted to be energized from a rectified alternating current source of variable frequency, comprising an output circuit for delivering a DC. output, load carrying controlled rectifier means having an anode-cathode circuit adapted to conduct unipolar current between said source and said output circuit, an error sensing circuit operatively connected to said output circuit, synchronized wide band switch control means operatively coupled to said controlled rectifier means and to said error sensing circuit for controlling the switching of said controlled rectifier, said switch control means including reset means responsive to the amplitude of said source for conditioning said control means, said control means being responsive to said reset means and said error sensing circuit whereby said anode-cathode circuit is conductive during the leading period of said alternating current source to regulate the amplitude of said D.C. output, said switch control means also comprising cut 011 means operable to periodically supply reverse cut off current to said controlled rectifier.

References Cited UNITED STATES PATENTS 2,776,382 1/1957 Jensen 307-88.5 3,009,093 11/1961 Seike 323-22 3,076,135 1/1963 Farnsworth 307-88.5 3,123,759 3/1964 Grey 321-18 3,211,989 10/1965 Mintz et al 323-22 3,213,350 10/1965 Armour 323-22 3,260,920 7/1966 Shoemaker 321-18 OTHER REFERENCES Power Supply Uses Switching Preregulation, Electronics, March 9, 1962 McGraw Hill, N.Y. TK-7800E58 (pages 62-64 relied on).

JOHN F. COUCH, Primary Examiner.

M. L. WACHTELL, Assistant Examiner. 

1. A SWITCHING TYPE REGULATED D.C. POWER SUPPLY ADAPTED TO BE ENERGIZED FROM A RECTIFIED ALTERNATING CURRENT SOURCE OF VARIABLE FREQUENCY, COMPRISING AN OUTPUT CIRCUIT FOR DELIVERING A D.C. OUTPUT, SEMICONDUCTIVE SWITCHING MEANS HAVING A SWITCH CIRCUIT ADAPTED TO CONDUCT UNIPOLAR CURRENT BETWEEN SAID SOURCE AND SAID OUTPUT CIRCUIT FOR REGULATING SAID OUTPUT, ERROR SENSING MEANS OPERATIVELY CONNECTED TO SAID OUTPUT CIRCUIT, SYNCHRONIZED WIDE BAND SWITCH CONTROL MEANS OPERATIVELY COUPLED TO SAID SWITCHING MEANS AND TO SAID ERROR SENSING MEANS FOR SWITCHING SAID SWITCHING, MEANS, SAID SWITCH CONTROL MEANS INCLUDING RESET MEANS CONNECTED TO BE RESPONSIVE TO THE AMPLITUDE OF SAID SOURCE FOR CONDITIONING SAID CONTROL MEANS IN SYNCHRONISM WITH SAID SOURCE, SAID CONTROL MEANS BEING RESPONSIVE TO SAID RESET MEANS AND SAID ERROR SENSING MEANS WHEREBY SAID SWITCH CIRCUIT IS RENDERED CONDUCTIVE DURING THE LEADING PERIOD OF SAID ALTERNATING CURRENT SOURCE TO REGULATE THE AMPLITUDE OF SAID D.C. OUTPUT, SAID SWITCH CONTROL MEANS ALSO COMPRISING LATCHING MEANS HAVING A MEMORY CHARACTERISTIC AND OPERABLE TO PERIODICALLY DEACTIVATE SAID CONTROL MEANS AND HOLDING SAME DEACTIVATED IN SYNCHRONISM WITH THE CYCLING OF SAID SOURCE. 